prefetch buffer造句

例句与造句

1. Another benefit is its prefetch buffer, which is 8-burst-deep.
2. The prefetch buffer depth can also be thought of as the ratio between the core memory frequency and the IO frequency.
3. DDR2's bus frequency is boosted by electrical interface improvements, on-die termination, prefetch buffers and off-chip drivers.
4. In contrast, the prefetch buffer of DDR2 is 4-burst-deep, and the prefetch buffer of DDR is 2-burst-deep.
5. In contrast, the prefetch buffer of DDR2 is 4-burst-deep, and the prefetch buffer of DDR is 2-burst-deep.
6. It's difficult to find prefetch buffer in a sentence. 用prefetch buffer造句挺难的
7. The DDR2 prefetch buffer is four bits deep, whereas it is two bits deep for DDR . While DDR SDRAM has typical read latencies of between two and three bus cycles, DDR2 may have read latencies between three and nine cycles, although the typical range is between four and six.
8. In a prefetch buffer architecture, when a memory access occurs to a row the buffer grabs a set of adjacent data words on the row and reads them out ( " bursts " them ) in rapid-fire sequence on the IO pins, without the need for individual column address requests.